With the advancement of FPGA technology, the integration of digital communication techniques with FPGAs has become a prominent trend in modern digital communication systems. To make high-speed communication systems more compact, cost-effective, and energy-efficient, while also improving device reliability, QPSK (Quadrature Phase Shift Keying) digital modulation is an ideal choice. It offers high spectral efficiency, excellent spectral characteristics, strong anti-interference capability, and fast data transfer rates. By implementing QPSK modem code using Verilog on the Xilinx FPGA platform and leveraging ISE's built-in IP cores, the system can fully realize both modulation and demodulation functions. This approach brings advantages such as high integration and easy software upgrades.
QPSK technology is widely used in digital communication systems due to its strong anti-interference performance, good error correction capabilities, and efficient use of the spectrum. With the development of very large-scale integrated circuits, FPGAs have become increasingly popular in digital communication applications. Various methods for implementing QPSK on FPGAs have been proposed. In this paper, Direct Digital Frequency Synthesis (DDS) is implemented using an FPGA. The phase modulation is achieved by controlling the output phase of the DDS signal, which acts as the carrier. Except for the DA conversion, all other processes can be executed within the FPGA. The QPSK modulated signal is a carrier-suppressed signal, meaning that the reference carrier cannot be directly extracted using a conventional phase-locked loop or narrowband filter. However, unlike some continuous-phase-modulated signals, the phase change in QPSK is limited to a finite number of discrete values. Therefore, nonlinear processing can be applied to eliminate the modulation information, generate a component related to the original carrier's phase, and then clean up the signal to recover the suppressed carrier, enabling coherent demodulation. The QPSK modem designed in this paper features a small size, low power consumption, high integration, strong software portability, and robust interference resistance, aligning well with future trends in communication technology.
The basic principle of QPSK modulation involves using four different phases of the carrier to represent digital information. Each phase corresponds to two bits of data, making each symbol a two-bit symbol. These symbols are typically represented using Gray code to minimize errors. For example, when the binary pair ab is 00, the carrier phase is 0°; when it is 01, the phase is 90°; when it is 11, the phase is 180°; and when it is 10, the phase is 270°.
There are two main methods for generating QPSK signals: phase modulation and phase selection. Since phase modulation is more commonly used and easier to implement, it was chosen for this project. A block diagram of the QPSK signal generated using phase modulation is shown in the figure. The serial-to-parallel converter splits the input binary sequence into two parallel bipolar sequences, denoted as a and b. These are then modulated by balanced modulators for the in-phase and quadrature carriers, respectively. The resulting signals are combined to produce the final QPSK signal. The phase encoding logic is such that when the two-bit symbol ab is 11, the output phase is 315°, when it is 01, the output phase is 225°, and so on.
Traditional QPSK analog modulators often use quadrature modulation, but digital implementations still rely on the same method, replacing analog components with digital signal processing algorithms. There are two primary approaches: phase selection and quadrature modulation. This paper uses phase selection method B to implement the QPSK signal, as illustrated in Figure 1.
MATLAB simulation of QPSK modulation is commonly available online, and the author of this article has written a piece of code that demonstrates the modulation principle. The code is listed below, with clear comments, and should be studied alongside the demodulation part for a complete understanding.
```matlab
clear all;
clc;
M=4;
Ts=1;
Fc=5;
N_sample=8; % number of samples per symbol
N_num=300; % 100 bits for each IQ channel
Dt=1/Fc/N_sample;
t=0:dt:N_num*Ts-dt;
T=dt*length(t);
Noise=(1/500)*randn(1,length(t))*32767;% add noise
Py1f=zeros(1,length(t));
Py2f=zeros(1,length(t));
for PL=1:1:700% increase noise intensity
D1=sign(randn(1,N_num));
D2=sign(randn(1,N_num));
d=[d1;d2];
D=reshape(d,1,[]); % input data sequence
Gt=ones(1,Fc*N_sample);
S1=sigexpand(d1,Fc*N_sample); % sign bit expansion
S2=sigexpand(d2,Fc*N_sample);
B1=conv(S1,Gt);
B2=conv(S2,Gt);
S1=B1(1:length(S1));
S2=B2(1:length(S2));
St_qpsk_1=S1.*round(cos(2*pi*Fc*t)*32767);
St_qpsk_2=S2.*round(sin(2*pi*Fc*t)*32767);
St_qpsk=St_qpsk_1+St_qpsk_2; % fixed-point quantized data
end
```
This MATLAB code generates a QPSK signal and includes noise for realistic simulation. The power spectrum of the transmitted signal can be plotted using `plot((abs(fft(St_qpsk,2048))).^2)` to analyze its frequency characteristics.
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